Port interrupt masked status register
| EDGE0 | Edge detected AND masked on IO pin 0 ‘0’: Interrupt was not forwarded to CPU ‘1’: Interrupt occurred and was forwarded to CPU |
| EDGE1 | Edge detected and masked on IO pin 1 |
| EDGE2 | Edge detected and masked on IO pin 2 |
| EDGE3 | Edge detected and masked on IO pin 3 |
| EDGE4 | Edge detected and masked on IO pin 4 |
| EDGE5 | Edge detected and masked on IO pin 5 |
| EDGE6 | Edge detected and masked on IO pin 6 |
| EDGE7 | Edge detected and masked on IO pin 7 |
| FLT_EDGE | Edge detected and masked on filtered pin selected by INTR_CFG.FLT_SEL |